1. Field of the Invention
The present invention relates to forming, in integrated form, memory devices. More specifically, the present invention relates to forming DRAMs, that is, memories requiring periodic refreshment.
2. Discussion of the Related Art
The increase in DRAM densities leads to forming control elements (generally MOS transistors) of memory points (capacitors) of more and more reduced dimensions (surface areas). This reduction in dimensions goes along with a reduction of the voltage levels that these elements can tolerate.
Accordingly, the use of DRAM memory point control transistors having reduced surface areas leads to reducing the charge levels stored in these memory points. Such a reduction makes the discrimination more difficult, at the level of sense amplifiers associated with the memory, between the states of an addressed storage element and of an associated reference storage element.
A first solution for overcoming this disadvantage would consist of increasing the responsiveness of sense amplifiers associated with the memory device to increase their accuracy until they are able to detect a level difference as small as approximately 50 mV. However, implementing such a solution means forming sense amplifiers including a greater and greater number of transistors, the thresholds of which must be set more and more accurately. Independently from the complications of the memory device integration process, the increase in the number of transistors forming such accurate sense amplifiers considerably reduces the advantages provided by the reduction of the characteristic dimensions of the control transistors of the storage elements of a DRAM.